銅與低介電材料介電層之系統整合及可靠度提升研究(II)

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DC Field	Value	Language
dc.contributor.author	邱碧秀	en_US
dc.contributor.author	CHIOU BI-SHIOU	en_US
dc.date.accessioned	2014-12-13T10:33:39Z	-
dc.date.available	2014-12-13T10:33:39Z	-
dc.date.issued	2003	en_US
dc.identifier.govdoc	NSC92-2216-E009-005	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/92183	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=828305&docId=156974	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	銅與低介電材料介電層之系統整合及可靠度提升研究(II)	zh_TW
dc.title	The Reliability Enhancement for the Integrated System of Copper and Low K Dielectric Interconnect (II)	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學電子工程學系	zh_TW
Appears in Collections:	Research Plans

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