標題: | 具可重覆使用智財之可組態可擴充特殊應用導向數位訊號處理架構 Configurable and Extensible Application-Specific Digital Signal Processor Architectures with Reusable Intelligent Property (IP) cores for System-on-Chip (SoC) Design |
作者: | 紀翔峰 HSIANG-FENGCHI 交通大學電信工程系 |
公開日期: | 2002 |
官方說明文件#: | NSC91-2218-E009-019 |
URI: | http://hdl.handle.net/11536/92968 https://www.grb.gov.tw/search/planDetail?id=818672&docId=154911 |
Appears in Collections: | Research Plans |
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