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dc.contributor.author邱碧秀en_US
dc.contributor.authorCHIOU BI-SHIOUen_US
dc.date.accessioned2014-12-13T10:36:18Z-
dc.date.available2014-12-13T10:36:18Z-
dc.date.issued2001en_US
dc.identifier.govdocNSC90-2216-E009-032zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/93855-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=673263&docId=128265en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.subject多層基板zh_TW
dc.subject低介電材料zh_TW
dc.subject界面可靠度zh_TW
dc.subject高密度zh_TW
dc.subject銅互接zh_TW
dc.subjectMultilayer substrateen_US
dc.subjectLow dielectric materialen_US
dc.subjectInterfacial reliabilityen_US
dc.subjectHigh densityen_US
dc.subjectCopper interconnectionen_US
dc.title高密度多層構裝基板與接合材料研究---子計畫II:銅接合-低介電材料介電層之界面可靠度提昇研究(III)zh_TW
dc.titleReliability Enhancement for Copper Interconnect-Low K Dielectric Interface (III)en_US
dc.typePlanen_US
dc.contributor.department國立交通大學電子工程學系zh_TW
Appears in Collections:Research Plans


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