| Title: | 多晶片模組可測試設計及測試方法 Testable Design and Testing of MCMs |
| Authors: | 王國禎 WANG KUO-CHEN 國立交通大學資訊科學研究所 |
| Issue Date: | 1995 |
| Gov't Doc #: | NSC84-2215-E009-055 |
| URI: | http://hdl.handle.net/11536/96347 https://www.grb.gov.tw/search/planDetail?id=172225&docId=29260 |
| Appears in Collections: | Research Plans |
- Testable design and testing of MCMs based on multifrequency scan / Tseng, WD;Wang, KC
- 多晶片模組之可測試設計及測試策略 / 曾王道;Wang-Dauh Tseng;王國禎;王國禎
- Fault coverage estimation model for partially testable multichip modules / Tseng, WD;Wang, KC
- Fault coverage and defect level estimation models for partially testable MCMs / Tseng, WD;Wang, K
- 超大型積體電路之測試與可測試性設計 / 李崇仁
- 超大型積體電路測試與可測性設計課程發展---子計畫(I)：總論、組合測試、序向測試、設計通例 / 周景揚;JOU JING-YANG
- 超大型積體電路之測試與可測試研究 / 李崇仁
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