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公開日期標題作者
1-十月-2001Active circuit's under wire bonding I/O, pads in 0.13 mu m eight-level Cu metal, FSG low-K inter-metal dielectric CMOS technology(+)Chou, KY; Chen, MJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十二月-2002Active devices under CMOS I/O padsChou, KY; Chen, MJ; Liu, CW; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-1998Back-gate bias enhanced band-to-band tunneling leakage in scaled MOSFET'sChen, MJ; Huang, HT; Hou, CS; Yang, KN; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-1996Back-gate forward bias method for low-voltage CMOS digital circuitsChen, MJ; Ho, JS; Huang, TH; Yang, CH; Jou, YN; Wu, T; 電子工程學系及電子研究所; 電控工程研究所; Department of Electronics Engineering and Institute of Electronics; Institute of Electrical and Control Engineering
6-二月-2006Channel-width dependence of low-frequency noise in process tensile-strained n-channel metal-oxide-semiconductor transistorsLu, MP; Lee, WC; Chen, MJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2001Characterization and modeling of edge direct tunneling (EDT) leakage in ultrathin gate oxide MOSFETsYang, KN; Huang, HT; Chen, MJ; Lin, YM; Yu, MC; Jang, SM; Yu, DCH; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2002Characterization and Modeling of on-chip inductor substrate coupling effectChao, CJ; Wong, SC; Hsu, CJ; Chen, MJ; Leu, LY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2002Characterization and modeling of on-chip inductor substrate coupling effectChao, CJ; Wong, SC; Hsu, CJ; Chen, MJ; Leu, LY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2002Characterization and Modeling of on-chip inductor substrate coupling effectChao, CJ; Wong, SC; Hsu, CJ; Chen, MJ; Leu, LY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2002Characterization and Modeling of on-chip spiral inductors for Si RFICsChao, CJ; Wong, SC; Kao, CH; Chen, MJ; Leu, LY; Chiu, KY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2000Edge hole direct tunneling in off-state ultrathin gate oxide p-channel MOSFETsYang, KN; Huang, HT; Chen, MJ; Lin, YM; Yu, MC; Jang, SM; Yu, CH; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十二月-2001Edge hole direct Tunneling leakage in ultrathin gate oxide p-channel MOSFETsYang, KN; Huang, HT; Chen, MJ; Lin, YM; Yu, MC; Jang, SSM; Yu, DCH; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2004Edge quantum yield in n-channel metal-oxide-semiconductor field-effect transistorKang, TK; Su, KC; Chang, YJ; Chen, MJ; Yeh, SH; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2001ESD protection under grounded-up bond pads in 0.13 mu m eight-level copper metal, fluorinated silicate glass low-k intermetal dielectric CMOS process technologyChou, KY; Chen, MJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-1998An extraction method to determine interconnect parasitic parametersChao, CJ; Wong, SC; Chen, MJ; Liew, BK; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-1998An extraction method to determine interconnect parasitic parametersChao, CJ; Wong, SC; Chen, MJ; Liew, BK; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2001Extraction of eleven model parameters for consistent reproduction of lateral bipolar snapback high-current I-V characteristics in NMOS devicesChen, MJ; Lee, HS; Chen, ST; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2001Families of graphs closed under taking powersChen, MJ; Chang, GJ; 應用數學系; Department of Applied Mathematics
2003Fast and precise subthreshold slope method for extracting gate capacitive coupling coefficient in flash memory cellsCho, CYS; Chen, MJ; Chen, CF; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2004Forward bias enhanced channel hot electron injection for low-level programming improvement in multilevel flash memoryCho, CYS; Chen, MJ; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
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