1. 目前位置：

瀏覽 的方式： 作者 Jiang, Iris Hui-Ru

跳到： 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
或是輸入前幾個字：  
顯示 1 到 20 筆資料，總共 60 筆  下一頁 >
公開日期標題作者
20113DICE: 3D IC Cost Evaluation Based on Fast Tier Number EstimationChan, Cheng-Chi; Yu, Yen-Ting; Jiang, Iris Hui-Ru; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2012Accurate Process-Hotspot Detection Using Critical Design Rule ExtractionYu, Yen-Ting; Chan, Ya-Chung; Sinha, Subarna; Jiang, Iris Hui-Ru; Chiang, Charles; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2010Analog Placement and Global Routing Considering Wiring SymmetryYang, Yu-Ming; Jiang, Iris Hui-Ru; 電機學院; 電子工程學系及電子研究所; College of Electrical and Computer Engineering; Department of Electronics Engineering and Institute of Electronics
七月-2016Analytical Clustering Score with Application to Postplacement Register ClusteringXu, Chang; Luo, Guojie; Li, Peixin; Shi, Yiyu; Jiang, Iris Hui-Ru; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2008Configurable Rectilinear Steiner Tree Construction for SoC and Nano TechnologiesJiang, Iris Hui-Ru; Yu, Yen-Ting; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015Criticality-Dependency-Aware Timing Characterization and AnalysisYang, Yu-Ming; Tam, King Ho; Jiang, Iris Hui-Ru; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2019DATC RDF-2019: Towards a Complete Academic Reference Design FlowChen, Jianli; Jiang, Iris Hui-Ru; Jung, Jinwook; Kahng, Andrew B.; Kravets, Victor N.; Li, Yih-Lang; Lin, Shih-Ting; Woo, Mingyu; 交大名義發表; National Chiao Tung University
1-一月-2018DATC RDF: An Academic Flow from Logic Synthesis to Detailed RoutingJung, Jinwook; Jiang, Iris Hui-Ru; Chen, Jianli; Lin, Shih-Ting; Li, Yih-Lang; Kravets, Victor N.; Nam, Gi-Joon; 交大名義發表; National Chiao Tung University
1-一月-2017DATC RDF: Robust Design Flow DatabaseJung, Jinwook; Lee, Pei-Yu; Wu, Yan-Shiun; Darav, Nima Karimpour; Jiang, Iris Hui-Ru; Kravets, Victor N.; Behjat, Laleh; Li, Yih-Lang; Nam, Gi-Joon; 交大名義發表; National Chiao Tung University
2014DRC-Based Hotspot Detection Considering Edge Tolerance and Incomplete SpecificationYu, Yen-Ting; Jiang, Iris Hui-Ru; Zhang, Yumin; Chiang, Charles; 交大名義發表; National Chiao Tung University
1-三月-2012ECOS: Stable Matching Based Metal-Only ECO SynthesisJiang, Iris Hui-Ru; Chang, Hua-Yu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2014Efficient Coverage-Driven Stimulus Generation Using Simultaneous SAT Solving, with Application to SystemVerilogCheng, An-Che; Yen, Chia-Chih (Jack); Val, Celina G.; Bayless, Sam; Hu, Alan J.; Jiang, Iris Hui-Ru; Jou, Jing-Yang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2019Efficient Search of Layout Hotspot Patterns for Matching SEM Images using Multilevel PixelationTseng, Sean Shang-En; Chang, Wei-Chun; Jiang, Iris Hui-Ru; Zhu, Jun; Shiely, James P.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2017Fast Low Power Rule Checking for Multiple Power Domain DesignLu, Chien-Pang; Jiang, Iris Hui-Ru; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2018FastPass: Fast Timing Path Search for Generalized Timing Exception HandlingLee, Pei-Yu; Jiang, Iris Hui-Ru; Chen, Tung-Chieh; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2014Functional ECO Using Metal-Configurable Gate-Array Spare CellsChang, Hua-Yu; Jiang, Iris Hui-Ru; Chang, Yao-Wen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2015GasStation: Power and Area Efficient Buffering for Multiple Power Domain DesignLu, Chien-Pang; Jiang, Iris Hui-Ru; Hsu, Chin-Hsiung; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2012Generic Integer Linear Programming Formulation for 3D IC PartitioningLee, Wan-Yu; Jiang, Iris Hui-Ru; Mei, Tsung-Wan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009GENERIC INTEGER LINEAR PROGRAMMING FORMULATION FOR 3D IC PARTITIONINGJiang, Iris Hui-Ru; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2019Graceful Register Clustering by Effective Mean Shift Algorithm for Power and Timing BalancingChang, Ya-Chu; Lin, Tung-Wei; Jiang, Iris Hui-Ru; Nam, Gi-Joon; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
顯示 1 到 20 筆資料，總共 60 筆  下一頁 >