Fully-depleted SOI MOSFET device and process for fabricating the same

標題:	Fully-depleted SOI MOSFET device and process for fabricating the same
作者:	Tsui, Bing-Yue Lin, Chia-Pin
公開日期:	16-十一月-2006
摘要:	The present invention proposes a nano-scale high-performance SOI MOSFET device and a process for manufacturing the same. The device is characterized by comprising: a metal oxide semiconductor, formed on the SOI substrate; a silicide layer (05), wherein a gate consists of a single full silicide gate (10), a high-K dielectric layer (08) and a part for work function modification (09); and source/drain (6) are complete through a silicide reaction and has a modified Schottky junction.
官方說明文件#:	H01L021/8238 H01L027/12 H01L029/76 H01L029/94 H01L021/44
URI:	http://hdl.handle.net/11536/105689
專利國:	USA
專利號碼:	20060255405
顯示於類別：	專利資料

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