標題: | Algorithm for a memory-based Viterbi decoder |
作者: | Chen-Yi, Lee Chien-Ching, Lin Chia-Cho, Wu |
公開日期: | 23-Dec-2004 |
摘要: | An algorithm for a memory-based Viterbi decoder is disclosed in the invention, which employs the property of a trace-back path; that is, the similarity between two consecutive trace-back paths becomes higher as the data error rate goes down. Therefore, the algorithm of the invention is to save the previous trace-back path into a register, and as soon as the current trace-back path is found to be the same as the previous one, the demanded path is obtained. After that, the memory read operations will stop, and thus the power consumption made by the memory read operations would be largely reduced. Besides, before the path trace-back, the path prediction can be executed by utilizing the property that the minimum path metric and the path are consecutive. In conclusion, the invention is capable of reducing the number of memory access operations and the power consumption by employing the mechanisms of path matching and path prediction. |
官方說明文件#: | H03M013/03 |
URI: | http://hdl.handle.net/11536/105758 |
專利國: | USA |
專利號碼: | 20040261005 |
Appears in Collections: | Patents |
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