Process and characteristics of fully silicided source/drain (FSD) thin-film transistors

Abstract

In this paper, high-performance fully silicided source/drain (FSD) thin-film transistors (TFTs) with FSD and ultrashort source/drain extension (SDE) fabricated by the implantto-silicide (ITS) technique are studied thoroughly. Using the ITS technique, not only the implantation damage but also the silicide spiking is avoided so that the thermal budget can be decreased obviously. The offstate current (I-off) of the FSD TFTs is equal to (n-channel) or smaller than (p-channel) that of the conventional TFTs. At onstate, due to the FSD and the SDE structure, the parasitic resistance of the S/D region and the carrier-injection resistance between silicide and channel are reduced. Therefore, superior onstate/offstate current ratio can be obtained. The influences of annealing temperature and time are also examined in this paper. A 600 degrees C/30-s rapid thermal annealing is sufficient to diffuse and activate dopants and, then, fabricate high-performance FSD TFTs. Excellent short-channel behavior of the FSD TFT is also confirmed. To conclude, the high-performance FSD TFT with low parasitic resistance fabricated by low-thermal-budget process is very promising for active-matrix liquid-crystal display, active-matrix organic light-emitting-diode display, and system-on-panel applications.