標題: MAUI: Making Aging Useful, Intentionally
作者: Wu, Kai-Chiang
Tseng, Tien-Hung
Li, Shou-Chun
資訊工程學系
Department of Computer Science
公開日期: 1-一月-2018
摘要: Device aging, which causes significant loss on circuit performance and lifetime, has been a primary factor in reliability degradation of nanoscale designs. In this paper, we propose to take advantage of aging-induced clock skews (i.e., make them useful for aging tolerance) by manipulating these lime-varying skews to compensate for the performance degradation of logic networks. The goal is to assign achievable/reasonable aging-induced clock skews in a circuit, such that its overall performance degradation due to aging can be minimized, that is, the lifespan can be maximized. On average, 25% aging tolerance can be achieved with insignificant design overhead.
URI: http://hdl.handle.net/11536/146203
ISSN: 1530-1591
期刊: PROCEEDINGS OF THE 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)
起始頁: 527
結束頁: 532
顯示於類別:會議論文