Invalid state identification for sequential circuit test generation

標題:	Invalid state identification for sequential circuit test generation
作者:	Liang, HC Lee, CL Chen, JE 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
公開日期:	1996
URI:	http://hdl.handle.net/11536/19837
ISBN:	0-8186-7478-4
期刊:	PROCEEDINGS OF THE FIFTH ASIAN TEST SYMPOSIUM (ATS '96)
起始頁:	10
結束頁:	15
顯示於類別：	會議論文