Stacked GeO/SrTiO(x) Resistive Memory with Ultralow Resistance Currents

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DC 欄位	值	語言
dc.contributor.author	Cheng, C. H.	en_US
dc.contributor.author	Chin, Albert	en_US
dc.contributor.author	Yeh, F. S.	en_US
dc.date.accessioned	2014-12-08T15:37:36Z	-
dc.date.available	2014-12-08T15:37:36Z	-
dc.date.issued	2011-01-31	en_US
dc.identifier.issn	0003-6951	en_US
dc.identifier.uri	http://dx.doi.org/10.1063/1.3549689	en_US
dc.identifier.uri	http://hdl.handle.net/11536/25858	-
dc.description.abstract	We report a high performance and low-power operated resistive memory. Using stacked covalent-bond-dielectric GeO(x) on metal-oxide SrTiO(x) to form the cost-effective Ni/GeO(x)/SrTiO(x)/TaN resistive random access memory, ultralow set power of small 1 mu W (0.9 mu A at 1.2 V), reset power of 13 pW (0.13 nA at 0.1 V), fast 50 ns switching time and good 10(6) cycling endurance are realized. (C) 2011 American Institute of Physics. [doi:10.1063/1.3549689]	en_US
dc.language.iso	en_US	en_US
dc.title	Stacked GeO/SrTiO(x) Resistive Memory with Ultralow Resistance Currents	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1063/1.3549689	en_US
dc.identifier.journal	APPLIED PHYSICS LETTERS	en_US
dc.citation.volume	98	en_US
dc.citation.issue	5	en_US
dc.citation.spage		en_US
dc.citation.epage		en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
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