A Pipelined Asynchronous 8051 Soft-core Implemented with Balsa

Abstract

Microcontrollers are widely used in many handheld devices and embedded systems. Thus, low power, reliability, and robustness have been becoming the critical issues for these microcontrollers. Asynchronous circuits may be one of the best solutions to answer these problems. It is widely known that the 8051 processor is the most popular 8-bit microcontroller; however, because of its CISC nature, the pipeline is not very easy to implement, especially for asynchronous circuits. In this paper, we propose a novel pipelined asynchronous 8051 microcontroller. The design is implemented with Balsa language which is a CSP-based asynchronous HDL, and synthesized into Xilinx netlist by Balsa synthesis tool. The design is compared with synchronous ones with Xilinx FPGA.