標題: | A 60 GHz Injection-Locked Frequency Tripler With Spur Suppression |
作者: | Kuo, Chien-Nan Yan, Tzu-Chao 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Capacitive cross-coupling;frequency tripler;injection-locking;notch filter |
公開日期: | 1-十月-2010 |
摘要: | A 60 GHz injection-locked frequency tripler is designed to improve spectral purity with spur suppression of the fundamental and the even-order harmonics. Several circuit designs are utilized in the harmonic current injection circuit to maximize the third-order harmonic and minimize the undesired harmonic current outputs, including notch filters and a capacitive cross-coupled transistor pair. With the input signal of 0.5 dBm at 19.7 GHz, the harmonic rejection ratios of the fundamental, and the second-order achieve 31.3 dBc, and 45.8 dBc, respectively. Implemented in 0.13 mu m CMOS technology, the core circuit consumes power of 9.96 mW with 1.2 V supply voltage. The entire die occupies an area of 985 x 866 mu m(2) |
URI: | http://dx.doi.org/10.1109/LMWC.2010.2060260 http://hdl.handle.net/11536/32148 |
ISSN: | 1531-1309 |
DOI: | 10.1109/LMWC.2010.2060260 |
期刊: | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS |
Volume: | 20 |
Issue: | 10 |
起始頁: | 560 |
結束頁: | 562 |
顯示於類別: | 期刊論文 |