| 標題: | TIMING MACROMODELS FOR CMOS STATIC SET RESET LATCHES AND THEIR APPLICATIONS |
| 作者: | WU, CY LI, C HWANG, JS 交大名義發表 電子工程學系及電子研究所 National Chiao Tung University Department of Electronics Engineering and Institute of Electronics |
| 公開日期: | 1-May-1988 |
| URI: | http://hdl.handle.net/11536/4535 |
| ISSN: | 0143-7062 |
| 期刊: | IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES |
| Volume: | 135 |
| Issue: | 3 |
| 起始頁: | 151 |
| 結束頁: | 160 |
| Appears in Collections: | Articles |
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- On-chip transient detection circuit for system-level ESD protection in CMOS integrated circuits to meet electromagnetic compatibility regulation / Ker, Ming-Dou;Yen, Cheng-Cheng;Shih, Pi-Chia
- NEW FAST FIXED-DELAY SIZING ALGORITHM FOR HIGH-PERFORMANCE CMOS COMBINATIONAL LOGIC-CIRCUITS AND ITS APPLICATIONS / HWANG, JS;WU, CY
- LATCHED CMOS DIFFERENTIAL LOGIC (LCDL) FOR COMPLEX HIGH-SPEED VLSI / WU, CY;CHENG, KH
- 低功率正反器與可重置的先進先出暫存器設計 / 蔡志侃;Tsai, Chi-Ken;黃威;Hwang Wei
- A new true-single-phase-clocking BiCMOS dynamic pipelined logic family for high-speed, low-voltage pipelined system applications / Tseng, YK;Wu, CY
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