非同步雙通道超大指令字組多處理器之資料記憶體元件與網路介面設計

Abstract

最近幾年多核心處理器已經為主流趨勢，我們甚至可以看到有些處理器擁有著167顆核心，而這些處理器主要是用來處理數位訊號相關的資料，這些資料量不僅相當的大並且需要一個有效率的元件去進行傳輸。我們提出了一個資料記憶體處理元件來處理多核心處理器內資料的往來，這個元件一方面是負責打包封包以及解封包，另一方面也是跟外面的路由器溝通的一個界面，當有資料需要往外傳輸時會一律通過這個資料記憶體處理元件。最後，我們將這個元件以及非同步雙道超大指令字組處理器做串連，並完成了多核心的非同步處理器。

In recent years, the number of computing resources in a single chip has been enormously increased. One of the mulicore processors even has 167 cores in the processor, and the purpose of these kinds of processors is used to process digital data. As we know the digital data are massive, we need an efficient way to transfer these data. We propose a data memory unit to process the data transferring between different core and global memory. This data memory unit not only packs and unpacks the data packet but also plays the role of communicating with router. All the packets which are sent out to router or received from router are processed by this unit, it is also a interface. We finally finish a multicore processor, we connect these Asynchronous two-way VLIW cores with this data memory unit.