Low-Threshold-Voltage TaN/LaTiO n-MOSFETs With Small EOT

Abstract

In this letter, we report a low threshold voltage (VI) of 0.12 V in self-aligned gate-first TaN/LaTiO n-MOSFETs, at an equivalent oxide thickness of only 0.63 run. This was achieved by using Ni-induced solid-phase diffusion of SiO(2)-covered Ni/Sb that reduced the high-kappa dielectric interfacial reactions.