標題: InAs high electron mobility transistors with buried gate for ultralow-power-consumption low-noise amplifier application
作者: Kuo, Chien-I
Hsu, Hen-Tung
Chang, Edward Yi
Miyamoto, Yasuyuki
Tsern, Wen-Chung
材料科學與工程學系
Department of Materials Science and Engineering
關鍵字: InAs/InGaAs;gate sinking;current gain cutoff frequency (f(T));ultralow power
公開日期: 1-九月-2008
摘要: An InAs/In(0.3)As composite channel high-electron-mobility transistor (HEMT) fabricated using the gate sinking technique was realized for ultralow-power-consumption low-noise application. The device has a very high transconductance of 100 mS/mm at at drain voltage of 0.5 V. The saturated drain-Source current of the device is 1066 mA/mm. A current grin cutoff frequency (f(T)) of 113 GHz and a maximum oscillation frequency (f(max)) of 110GHz were achieved at only drain bias volume V(ds) = 0.1V. The 0.08 x 40 mu m(2) device demonstrated a minimum noise figure of 0.82 dB and a 14 dB associated gain at 17GHz with 1.14mW DC power consumption.
URI: http://dx.doi.org/10.1143/JJAP.47.7119
http://hdl.handle.net/11536/8397
ISSN: 0021-4922
DOI: 10.1143/JJAP.47.7119
期刊: JAPANESE JOURNAL OF APPLIED PHYSICS
Volume: 47
Issue: 9
起始頁: 7119
結束頁: 7121
顯示於類別:期刊論文


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