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公開日期標題作者
2013A 0.0354mm(2) 82 mu W 125KS/s 3-Axis Readout Circuit for Capacitive MEMS AccelerometerLai, Kelvin Yi-Tse; He, Zih-Cheng; Yang, Yu-Tao; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2007A 0.22nJ/b/iter 0.13 mu m turbo decoder chip using inter-block permutation interleaverWong, Cheng-Chi; Tang, Cheng-Hao; Lai, Ming-Wei; Zheng, Yan-Xiu; Lin, Chien-Ching; Chang, Hsie-Chia; Lee, Chen-Yi; Su, Yu-T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A 0.92mm(2) 23.4mW Fully-Compliant CTC Decoder for WiMAX 802.16e ApplicationYen, Shao-Wei; Hu, Ming-Chih; Chen, Chih-Lung; Chang, Hsie-Chia; Jou, Shyh-Jye; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2014A 1-100Mb/s 0.5-9.9mW LDPC Convolutional Code Decoder for Body Area NetworkChen, Chih-Lung; Wu, Sheng-Jhan; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015A 1.31Gb/s, 96.6% Utilization Stochastic Nonbinary LDPC Decoder for Small Cell ApplicationsLee, Xin-Ru; Yang, Chih-Wen; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A 1.69 Gb/s Area-Efficient AES Crypto Core with Compact On-the-fly Key Expansion UnitLiu, Po-Chun; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2018A 1.86mJ/Gb/Query Bit-Plane Payload Machine Learning Processor in 90nm CMOSKu, Fang-Ju; Wu, Tung-Yu; Liao, Yen-Chin; Chang, Hsie-Chia; Wong, Wing Hung; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A 11.5-Gbps LDPC Decoder Based on CP-PEG Code ConstructionChen, Chih-Lung; Lin, Kao-Shou; Chang, Hsie-Chia; Fang, Wai-Chi; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2009A 188-size 2.1mm(2) Reconfigurable Turbo Decoder Chip with Parallel Architecture for 3GPP LTE SystemWong, Cheng-Chi; Lee, Yung-Yu; Chang, Hsie-Chia; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A 188-size 2.1mm(2) Reconfigurable Turbo Decoder Chip with Parallel Architecture for 3GPP LTE SystemWong, Cheng-Chi; Lee, Yung-Yu; Chang, Hsie-Chia; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A 188-size 2.1mm(2) Reconfigurable Turbo Decoder Chip with Parallel Architecture for 3GPP LTE SystemWong, Cheng-Chi; Lee, Yung-Yu; Chang, Hsie-Chia; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2012A 2.37-Gb/s 284.8 mW Rate-Compatible (491,3,6) LDPC-CC DecoderChen, Chih-Lung; Lin, Yu-Hsiang; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2014A 2.56 Gb/s Soft RS (255,239) Decoder Chip for Optical Communication SystemsLin, Yi-Min; Hsu, Chih-Hsiang; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-2019A (21150,19050) GC-LDPC Decoder for NAND Flash ApplicationsLiao, Yen-Chin; Lin, Chien; Chang, Hsie-Chia; Lin, Shu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2010A 26.9 K 314.5 Mb/s Soft (32400,32208) BCH Decoder Chip for DVB-S2 SystemLin, Yi-Min; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A 26.9K 314.5Mbps Soft (32400,32208) BCH Decoder Chip for DVB-S2 SystemLin, Yi-Min; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2014A 3.3V 15.6b 6.1pJ/0.02% RH with 10ms Response Humidity Sensor for Respiratory MonitoringLai, Kelvin Yi-Tse; Yang, Yu-Tao; Chen, Bang-Jing; Shen, Chun-Jen; Shiu, Ming-Feng; He, Zih-Cheng; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2013A 3.40ms/GF(p(521)) and 2.77ms/GF(2(521)) DF-ECC Processor with Side-Channel Attack ResistanceLee, Jen-Wei; Chung, Szu-Chi; Chang, Hsie-Chia; Lee, Chen-Yi; 交大名義發表; National Chiao Tung University
2015A 3.46 Gb/s (9141,8224) LDPC-based ECC scheme and on-line channel estimation for Solid-State Drive ApplicationsHo, Kin-Chu; Chen, Chih-Lung; Liao, Yen-Chin; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013A 3.66Gb/s 275mW TB-LDPC-CC Decoder Chip for MIMO Broadcasting CommunicationsChen, Chih-Lung; Lan, Yu-Cheng; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics