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顯示 1 到 19 筆資料，總共 19 筆
公開日期標題作者
1-二月-2013A 2-bit/Cell Gate-All-Around Flash Memory of Self-Assembled Silicon NanocrystalsChen, Hung-Bin; Chang, Chun-Yen; Hung, Min-Feng; Tang, Zih-Yun; Cheng, Ya-Chi; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2-十一月-2015Back-gate bias effect on nanosheet hybrid P/N channel of junctionless thin-film transistor with increased I-on versus decreased I-offCheng, Ya-Chi; Chen, Hung-Bin; Chang, Chun-Yen; Wu, Yi-Kang; Shih, Yi-Jia; Shao, Chi-Shen; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2013Characteristic of p-Type Junctionless Gate-All-Around Nanowire Transistor and Sensitivity AnalysisHan, Ming-Hung; Chang, Chun-Yen; Jhan, Yi-Ruei; Wu, Jia-Jiun; Chen, Hung-Bin; Cheng, Ya-Chi; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2015Characteristics of a Novel Poly-Si P-Channel Junctionless Thin-Film Transistor With Hybrid P/N-SubstrateCheng, Ya-Chi; Chen, Hung-Bin; Su, Jun-Ji; Shao, Chi-Shen; Thirunavukkarasu, Vasanthan; Chang, Chun-Yen; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2013Characteristics of Gate-All-Around Junctionless Poly-Si TFTs With an Ultrathin ChannelChen, Hung-Bin; Chang, Chun-Yen; Lu, Nan-Heng; Wu, Jia-Jiun; Han, Ming-Hung; Cheng, Ya-Chi; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
11-十二月-2014Characterizing the electrical properties of raised S/D junctionless thin-film transistors with a dual-gate structureCheng, Ya-Chi; Chen, Hung-Bin; Su, Jun-Ji; Shao, Chi-Shen; Wang, Cheng-Ping; Chang, Chun-Yen; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2013Device and Circuit Performance Estimation of Junctionless Bulk FinFETsHan, Ming-Hung; Chang, Chun-Yen; Chen, Hung-Bin; Cheng, Ya-Chi; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
16-九月-2013High voltage characteristics of junctionless poly-silicon thin film transistorsCheng, Ya-Chi; Wu, Yung-Chun; Chen, Hung-Bin; Han, Ming-Hung; Lu, Nan-Heng; Su, Jun-Ji; Chang, Chun-Yen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2012High-Reliability Trigate Poly-Si Channel Flash Memory Cell With Si-Nanocrystal Embedded Charge-Trapping LayerChen, Hung-Bin; Wu, Yung-Chun; Chen, Lun-Chun; Chiang, Ji-Hong; Yang, Chao-Kan; Chang, Chun-Yen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2016A Highly Scalable Poly-Si Junctionless FETs Featuring a Novel Multi-Stacking Hybrid P/N Layer and Vertical Gate with Very High Ion/Ioff for 3D Stacked ICsCheng, Ya-Chi; Chen, Hung-Bin; Chang, Chun-Yen; Cheng, Chun-Hu; Shih, Yi-Jia; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2013Improving Breakdown Voltage of LDMOS Using a Novel Cost Effective DesignHan, Ming-Hung; Chen, Hung-Bin; Chang, Chia-Jung; Tsai, Chi-Chong; Chang, Chun-Yen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2019Low-Voltage Programmable Gate-All-Around (GAA) Nanosheet TFT Nonvolatile Memory Using Band-to-Band Tunneling Induced Hot Electron (BBHE) MethodChen, Lun-Chun; Chen, Hung-Bin; Chang, Yu-Shuo; Lin, Shih-Han; Han, Ming-Hung; Wu, Jia-Jiun; Yeh, Mu-Shin; Lin, Yu-Ru; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2012A Novel Cost Effective Double Reduced Surface Field Laterally Diffused Metal Oxide Semiconductor Design for Improving Off-State Breakdown VoltageHan, Ming-Hung; Chen, Hung-Bin; Chang, Chia-Jung; Wu, Jia-Jiun; Chen, Wen-Chong; Tsai, Chi-Chong; Chang, Chun-Yen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2013Performance Comparison Between Bulk and SOI Junctionless TransistorsHan, Ming-Hung; Chang, Chun-Yen; Chen, Hung-Bin; Wu, Jia-Jiun; Cheng, Ya-Chi; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2014Performance Enhancement of a Novel P-type Junctionless Transistor Using a Hybrid Poly-Si Fin ChannelCheng, Ya-Chi; Chen, Hung-Bin; Shao, Chi-Shen; Su, Jun-Ji; Wu, Yung-Chun; Chang, Chun-Yen; Chang, Ting-Chang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2007Reliability Study on Tri-Gate Nanowires Poly-Si TFTs under DC and AC Hot-Carrier StressWu, Yung-Chun; Chen, Hung-Bin; Feng, Li-Wei; Chang, Ting-Chang; Liu, Po-Tsun; Chang, Chun-Yen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
13-八月-2014Temperature dependence of electronic behaviors in quantum dimension junctionless thin-film transistorCheng, Ya-Chi; Chen, Hung-Bin; Han, Ming-Hung; Lu, Nan-Heng; Su, Jun-Ji; Shao, Chi-Shen; Wu, Yung-Chun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
23-九月-2013Temperature-dependent characteristics of junctionless bulk transistorHan, Ming-Hung; Chen, Hung-Bin; Yen, Shiang-Shiou; Shao, Chi-Shen; Chang, Chun-Yen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2012具閘極包圍的奈米線通道電晶體及非揮發性記憶體陳弘斌; Chen, Hung-Bin; 張俊彥; 吳永俊; Chang, Chun-Yen; Wu, Yung-Chun; 電子工程學系 電子研究所
顯示 1 到 19 筆資料，總共 19 筆