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公開日期標題作者
2001Barrier characteristics of PECVD alpha-SiC : H dielectricsChiang, CC; Wu, ZC; Wu, WH; Chen, MC; Ko, CC; Chen, HP; Jeng, SM; Jang, SM; Yu, CH; Liang, MS; 電子物理學系; Department of Electrophysics
2001Comparative study of physical and electrical characteristics of F- and C-doped low-K CVD oxidesWu, ZC; Shiung, ZW; Chiang, CC; Wu, WH; Chen, MC; Jeng, SM; Chang, W; Chou, PF; Jang, SM; Yu, CH; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2001Dielectric and barrier properties of spin-on organic aromatic low dielectric constant polymers FLARE and SiLKWu, ZC; Shiung, ZW; Wu, RG; Liu, YL; Wu, WH; Tsui, BY; Chen, MC; Chang, W; Chou, PF; Jang, SM; Hu, CH; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2004Effects of base oxide in HfSiO/SiO2 high-k gate stacksWu, WH; Chen, MC; Wang, MF; Hou, TH; Yao, LG; Jin, Y; Chen, SC; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2005Effects of base oxide thickness and silicon composition on charge trapping in HfSiO/SiO(2) high-k gate stacksWu, WH; Chen, MC; Tsui, BY; How, YT; Yao, LG; Jin, Y; Tao, HJ; Chen, SC; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2005Effects of base oxide thickness and silicon composition on charge trapping in HfSiO/SiO2 high-k gate stacksWu, WH; Chen, MC; Tsui, BY; How, YT; Yao, LG; Jin, Y; Tao, HJ; Chen, SC; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2005Formation of NiSi-silicided p(+)n shallow junctions by BF(2)(+) implantation into/through silicide and rapid thermal annealingWang, CC; Wu, YK; Wu, WH; Chen, MC; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2005Formation of NiSi-silicided p(+)n shallow junctions by BF2+ implantation into/through silicide and rapid thermal annealingWang, CC; Wu, YK; Wu, WH; Chen, MC; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2001Leakage mechanism in Cu damascene structure with methylsilane-doped low-K CVD oxide as intermetal dielectricWu, ZC; Chiang, CC; Wu, WH; Chen, MC; Jeng, SM; Li, LJ; Jang, SM; Yu, CH; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2003Physical and barrier properties of plasma enhanced chemical vapor deposition alpha-SiC : N : H filmsChiang, CC; Wu, ZC; Wu, WH; Chen, MC; Ko, CC; Chen, HP; Jang, SM; Yu, CH; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2001Physical and electrical characteristics of F- and C-doped low dielectric constant chemical vapor deposited oxidesWu, ZC; Shiung, ZW; Chiang, CC; Wu, WH; Chen, MC; Jeng, SM; Chang, W; Chou, PF; Jang, SM; Yu, CH; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2001Physical and electrical characteristics of methylsilane- and trimethylsilane-doped low dielectric constant chemical vapor deposited oxidesWu, ZC; Shiung, ZW; Chiang, CC; Wu, WH; Chen, MC; Jeng, SM; Chang, W; Chou, PF; Jang, SM; Yu, CH; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2006Two-frequency C-V correction using five-element circuit model for high-k gate dielectric and ultrathin oxideWu, WH; Tsui, BY; Huang, YP; Hsieh, FC; Chen, MC; Hou, YT; Jin, Y; Tao, HJ; Chen, SC; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics