ARM匯流排介面之設計

Abstract

現今有許多的應用是必須同時結合微控制器與數位信號處理器的功能，因此在單晶片系統的環境下整合這兩個智產(IP)，同時用來處理控制及信號結合的工作是非常重要的課題。本論文為了維持數位信號處理器的高效能，數位信號處理器的時脈週期將高於系統的時脈週期，以提升其運算速度，達到加速計算的目的。 本論文中，選擇DR8051為系統的微控制器，ADSP2188為系統的數位訊號處理器，並根據ARM公司所提出的SoC匯流排AMBA架構及協定來整合數位訊號處理器及微控制器。本論文除了設計微控制器及數位訊號處理器的轉換器(wrapper)來符合AMBA匯流排的協定外，還包含了直接記憶體存取、同步動態記憶體控制器及AMBA架構一些基本的元件﹕仲裁器、解碼器與橋接器等模組，以達到一基本的單晶片系統。最後利用微控制器控制數位訊號處理器執行一個離散傅立葉轉換(DFT)的程式，並從微控制器來監控最後執行的結果。 整個架構是以硬體描述語言VHDL(Very High Speed Integration Circuit Hardware Description Language)撰寫完成，並利用Xilinx公司Virtex Ⅱ xc2v6000型之FPGA晶片實現整個系統，系統時脈週期可達48MHZ，數位信號處理器時脈週期可達75MHZ。

Many applications nowadays must be combined the function of microcontroller and DSP simultaneously，so it is a very important topic to combine the two IP , DSP and microcontroller ,in SoC system to process the control and signal work simultaneously. In order to maintain the high efficiency of DSP，this thesis will use higher clock cycle time of DSP than that of system to promote operating rate and achieve the goal of acceleration. In this thesis，we choose the DR8051 as our microcontroller and the ADSP2188 as our DSP. We also choose the architecture and protocol of AMBA which ARM Corporation proposed to integrate DSP and microcontroller.In order to build a basic SoC system，We not only design the microcontroller wrapper and the DSP wrapper in AMBA protocol，but also design DMA，SDRAM controller and some basic units in AMBA﹕Arbiter、Decoder and Bridge ,etc. Finally, by using microcontroller, we can control the DSP to execute a DFT program and monitor the result through the microcontroller. This architecture is accomplished by Hardware Description Language VHDL. The whole system is realized by Xilinx Corporation Virtex Ⅱ xc2v6000 FPGA. The clock cycle time of system can reach 48MHZ，The clock cycle time of DSP can reach 75MHZ.