Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 蔣陳偉 | en_US |
dc.contributor.author | Chen-Wei Chiang | en_US |
dc.contributor.author | 葉清發 | en_US |
dc.contributor.author | Ching-Fa Yeh | en_US |
dc.date.accessioned | 2014-12-12T02:24:39Z | - |
dc.date.available | 2014-12-12T02:24:39Z | - |
dc.date.issued | 2004 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT009211581 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/66534 | - |
dc.description.abstract | 複晶矽薄膜電晶體對於應用在液晶顯示器上能夠有效的減少面積且提升顯示器之解析度,且複晶矽薄膜電晶體相較於非晶矽而言有較大的載子遷移率,所以利用複晶矽薄膜電晶體可以將周邊電路整合在玻璃基板上來降低成本,但是對於複晶矽薄膜電晶體卻有較大的漏電流,而使的元件的功率損耗很嚴重。對於複晶矽薄膜電晶體其漏電主要與缺陷密度和集極電場強度有關,在本篇論文中我們發現氮化矽絕緣層能夠有效的阻擋氫原子向下擴散而累積在通道之中,更進一步的去修補通道中的缺陷。因此我們利用此種特性設計了氮化矽緩衝層的薄膜電晶體結構來增加電將處理的修補效率,我們也比較了長時間電漿處理對於傳統薄膜電晶體結構和氮化矽緩衝層的薄膜電晶體結構的差異。 傳統的複晶矽薄膜電晶體結構會因為較高的汲極電場而導致有較高的漏電流和熱電子可靠的的問題,因此我們利用選擇性液相沉積來製作自我對準的T型閘極結構的複晶矽薄膜電晶體,用來降低汲極端的側向電場來有效的降低漏電。同時kink的效應也明顯的降低和熱載子的可靠度也明顯的提升,然後我們也研究T型閘極的結構和一般傳統結構對於電漿處理後的差異。 | zh_TW |
dc.description.abstract | Application of polycrystalline silicon thin-film transistors (poly-Si TFTs) in large area active-matrix liquid-crystal displays (AMLCDs) can effectively improve resolution and reduce the export area, and poly-Si TFTs have higher field effect mobility than α-Si. That the poly-Si can integrate the peripheral circuit in glass substrate and reduce cost. Currently, the anomalous leakage current was major problem for poly-Si TFTs then increase the power consumption. The leakage current of poly-Si TFTs is owing to the high drain electric field and large trap state density at drain junction. In this thesis, we found the silicon nitride film as the diffusion barrier prevents the hydrogen atoms downward diffusion and accumulated at the channel to further reduce the trap state density. We developed the buffer nitride layer poly-Si thin film transistor to increase the passivation efficiency. We also compare the device characteristics of conventional TFTs and buffer nitride layer TFTs for long time plasma passivation. The conventional poly-Si thin film transistors have large leakage current and poor hot carrier endurance at high drain electric field. So we using the selective liquid phase deposition technique to fabricate the self-align T-gate poly-Si thin film transistors. The T-gate structure can reduce the drain side lateral electric field and decrease the off-state leakage current. It also release the impact ionization effect so that the kink effect to been suppressed and improve the hot carrier endurance. Finally, we compare the conventional thin film transistors and T-gate thin film transistor characteristic for plasma passivation effect. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 薄膜 | zh_TW |
dc.subject | 薄膜電晶體 | zh_TW |
dc.subject | T型閘極 | zh_TW |
dc.subject | 電漿 | zh_TW |
dc.subject | thin film | en_US |
dc.subject | thin film transistors | en_US |
dc.subject | T gate | en_US |
dc.subject | plasma | en_US |
dc.title | 利用T型閘極與氨氣電漿處理提升薄膜電晶體元件可靠度之研究 | zh_TW |
dc.title | Improving Reliability Characteristics of Thin Film Transistors by T-gate Structure and NH3 Plasma Passivation | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
Appears in Collections: | Thesis |
Files in This Item:
-
158101.pdf
-
158102.pdf
-
158103.pdf
-
158104.pdf
-
158105.pdf
-
158106.pdf
-
158107.pdf
-
158108.pdf
-
158109.pdf
-
158110.pdf
If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.