高壓元件LDMOS可靠度分析與SPICE模型建立

Abstract

隨著半導體產業的發展，高功率元件經常被應用在許多電力電子方面。LDMOS(平面二次擴散之金氧半場效電晶體)通常在高壓積體電路中作為驅動元件。本論文內容探討LDMOS的基本特性，並建立SPICE模型，最後作可靠性分析。 由於結構與傳統MOSFET有所不同，故在應用上缺少內建的高壓元件模型，本論文中，利用子電路（sub-circuit）的模擬方法來建立LDMOS電流-電壓SPICE模型。此子電路中主要部分包含了一個傳統MOSFET與一個受閘極與汲極控制的可變電阻。首先，先以一個 MOS模型描述邊際效應(Fringe effect)所產生的邊際電流(fringe current) ; 再利用LDMOS在低閘極電壓與高閘極電壓有著不同特性的現象，從低閘極電壓區域萃取出MOS模型，再藉由此MOS模型反算出外掛電阻模型，最後以自我熱效應公式修正模擬值，即完成一單一尺寸LDMOS模型。並考慮不同尺寸與操作環境的應用，將四個邊界尺寸模型做箱化，以期最後可適用於各種尺寸與操作模式的元件。 在LDMOS可靠性研究上，我們使用電荷幫浦的實驗方法(Charge Pumping Technique)探討不同的加壓條件下，不同的區域各有何不同的損害產生。 根據我們的研究，可以歸納出以下結果：可以從LDMOS本身萃取出SPICE 模型，而不需要MESDRIFT結構(多了一個接觸點佈值); 並可以對尺寸做模型箱化，成功的使模型可以準確模擬不同尺寸與環境的LDMOS。而在可靠度的研究上也發現，在有最大閘極漏電流的加壓條件下，LDMOS的熱載子退化現象最為明顯。

Power metal-oxide-semiconductor field-effect transistors (MOSFETs) have been widely applied to power electronics owing to great semiconductor industry. LDMOS (lateral Double-Diffused MOSFET) is usually the driver component in high voltage integrated circuits. In our study, we will engage in the characteristics of LDMOS including of SPICE macro model and the reliability issues. Because the architecture of a LDMOS is different from it of a MOSFET, there is still a lack of SPICE model for LDMOS. In our study, we use the sub-circuit method to model a LDMOS device. The method mainly consists of an intrinsic MOS model and a gate and drain voltage controlled resistance. In addition, we model the extra fringe currents by giving a fringe MOS model. After deducing the influence of the fringe effect, we extract the MOS model from I-V measured data in low-Vg stage region and reverse calculate the external resistance in high-Vg stage region using the MOS model. Finally, the model is amended by correcting function of self-heating. Not only achieving a single size device, we also consider the application of LDMOS scaling problems and various operation modes. Therefore, we used the binning technique to bin the models from four corner size models to generate a universal SPICE macro model suitable for various devices of different sizes and operation conditions. Another part of our study is the investigation of the reliability issue of various hot-carrier degradation modes. We identify the properties of trap types and locations of oxide damage under different hot-carrier stress modes by using a novel three-region charge pumping technique. According to our study, we can conclude that: We don’t need MESDRIFT devices and can extract a SPICE macro model from LDMOS. And the research about reliability of LDMOS shows that there is most serious hot-carrier degradation under max. Ig stress condition.