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顯示 41 到 60 筆資料，總共 191 筆 < 上一頁   下一頁 >
公開日期標題作者
1-七月-2013High-kappa Eu2O3 and Y2O3 Poly-Si Thin-Film Transistor Nonvolatile Memory DevicesPan, Tung-Ming; Yen, Li-Chen; Huang, Sheng-Hao; Lo, Chieh-Ting; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-十一月-2006High-kappa material sidewall with source/drain-to-gate non-overlapped structure for low standby power applicationsMa, Ming-Wen; Chao, Tien-Sheng; Kao, Kuo-Hsing; Huang, Jyun-Siang; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-十月-2013High-Performance Double-Layer Nickel Nanocrystal Memory by Ion Bombardment TechniqueLiu, Sheng-Hsien; Yang, Wen-Luh; Lin, Yu-Hsien; Wu, Chi-Chang; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-十一月-2014High-Performance GAA Sidewall-Damascened Sub-10-nm In Situ n(+)-Doped Poly-Si NWs Channels Junctionless FETsKuo, Po-Yi; Lu, Yi-Hsien; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-六月-2008High-performance metal-induced laterally crystallized polycrystalline silicon p-channel thin-film transistor with TaN/HfO2 gate stack structureMa, Ming-Wen; Chao, Tien-Sheng; Su, Chun-Jung; Wu, Woei-Cherng; Kao, Kuo-Hsing; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-七月-2009High-performance p-channel LTPS-TFT using HfO(2) gate dielectric and nitrogen ion implantationMa, Ming-Wen; Chiang, Tsung-Yu; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-七月-2009High-performance p-channel LTPS-TFT using HfO2 gate dielectric and nitrogen ion implantationMa, Ming-Wen; Chiang, Tsung-Yu; Chao, Tien-Sheng; Lei, Tan-Fu; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
十一月-2016High-Performance Pi-Gate Poly-Si Junctionless and Inversion Mode FETHsieh, Dong-Ru; Lin, Jer-Yi; Kuo, Po-Yi; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-十月-2015High-performance poly-Si TFT with ultra-thin channel film and gate oxide for low-power applicationChen, Yi-Hsuan; Ma, William Cheng-Yu; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
2011High-Performance Poly-Si TFTs of Top-Gate with High-kappa Metal-Gate Combine the Laser Annealed Channel and Glass SubstrateLu, Yi-Hsien; Chien, Chao-Hsin; Kuo, Po-Yi; Yang, Ming-Jui; Lin, Hsiao-Yi; Chao, Tien-Sheng; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-二月-2012High-Performance Poly-Si Thin-Film Transistors With L-Fin ChannelsLu, Yi-Hsien; Kuo, Po-Yi; Lin, Je-Wei; Wu, Yi-Hong; Chen, Yi-Hsuan; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-一月-2013High-Performance Polyimide-Based ReRAM for Nonvolatile Memory ApplicationLiu, Sheng-Hsien; Yang, Wen-Luh; Wu, Chi-Chang; Chao, Tien-Sheng; Ye, Meng-Ru; Su, Yu-Yuan; Wang, Po-Yang; Tsai, Ming-Jui; 電子物理學系; Department of Electrophysics
二月-2017High-performance sidewall damascened tri-gate poly-si TFTs with the strain proximity free technique and stress memorization techniqueHsieh, Dong-Ru; Kuo, Po-Yi; Lin, Jer-Yi; Chen, Yi-Hsuan; Chang, Tien-Shun; Chao, Tien-Sheng; 電子物理學系; 光電工程學系; Department of Electrophysics; Department of Photonics
1-五月-2017High-Performance Uniaxial Tensile Strained n-Channel JL SOI FETs and Triangular JL Bulk FinFETs for Nanoscaled ApplicationsSung, Po-Jung; Cho, Ta-Chun; Hou, Fu-Ju; Hsueh, Fu-Kuo; Chung, Sheng-Ti; Lee, Yao-Jen; Current, Michael I.; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
1-十月-2008High-program/erase-speed SONOS with in situ silicon nanocrystalsChiang, Tsung-Yu; Chao, Tien-Sheng; Wu, Yi-Hong; Yang, Wen-Luh; 電子物理學系; Department of Electrophysics
1-九月-2010High-Reliability Dynamic-Threshold Source-Side Injection for 2-Bit/Cell With MLC Operation of Wrapped Select-Gate SONOS in NOR-Type Flash MemoryWang, Kuan-Ti; Chao, Tien-Sheng; Wu, Woei-Cherng; Yang, Wen-Luh; Lee, Chien-Hsing; Hsieh, Tsung-Min; Liou, Jhyy-Cheng; Wang, Shen-De; Chen, Tzu-Ping; Chen, Chien-Hung; Lin, Chih-Hung; Chen, Hwi-Huang; 電子物理學系; Department of Electrophysics
1-六月-2009High-Speed Multilevel Wrapped-Select-Gate SONOS Memory Using a Novel Dynamic Threshold Source-Side-Injection (DTSSI) Programming MethodWang, Kuan-Ti; Chao, Tien-Sheng; Wu, Woei-Cherng; Chiang, Tsung-Yu; Wu, Yi-Hong; Yang, Wen-Luh; Lee, Chien-Hsing; Hsieh, Tsung-Min; Liou, Jhyy-Cheng; Wang, Shen-De; Chen, Tzu-Ping; Chen, Chien-Hung; Lin, Chih-Hung; Chen, Hwi-Huang; 電子物理學系; Department of Electrophysics
2007A highly reliable multi-level and 2-bit/cell operation of wrapped-select-gate (WSG) SONOS memory with optimized ONO thicknessWu, Woei-Cherng; Chao, Tien-Sheng; Peng, Wu-Chin; Yang, Wen-Luh; Wang, Jer-Chyi; Chen, Jian-Hao; Ma, Ming-Wen; Lai, Chao-Sung; Yang, Tsung-Yu; Chen, Tzu-Ping; Chen, Chien-Hung; Lin, Chih-Hung; Chen, Hwi-Huang; Ko, Joe; 物理研究所; Institute of Physics
1-三月-2007Highly reliable multilevel and 2-bit/cell operation of wrapped select gate (WSG) SONOS memoryWu, Woei-Cherng; Chao, Tien-Sheng; Peng, Wu-Chin; Yang, Wen-Luh; Wang, Jer-Chyi; Chen, Jian-Hao; Lai, Chao-Sung; Yang, Tsung-Yu; Lee, Chien-Hsing; Hsieh, Tsung-Min; Liou, Jhyy Cheng; 電子物理學系; Department of Electrophysics
1-六月-2012Hydrogen Instability Induced by Postannealing on Poly-Si TFTsLiao, Chia-Chun; Lin, Min-Chen; Chao, Tien-Sheng; 電子物理學系; Department of Electrophysics
顯示 41 到 60 筆資料，總共 191 筆 < 上一頁   下一頁 >