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公開日期標題作者
1-八月-2011Bipolar switching characteristics of low-power Geo resistive memoryCheng, C. H.; Chen, P. C.; Liu, S. L.; Wu, T. L.; Hsu, H. H.; Chin, Albert; Yeh, F. S.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2010Characteristics of Cerium Oxide for Metal-Insulator-Metal CapacitorsCheng, C. H.; Hsu, H. H.; Chen, W. B.; Chin, Albert; Yeh, F. S.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2008Comparison of MONOS memory device integrity when using Hf(1-x-y)N(x)O(y) trapping layers with different N compositionsYang, H. J.; Cheng, C. F.; Chen, W. B.; Lin, S. H.; Yeh, F. S.; McAlister, Sean P.; Chin, Albert; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2009Flat band voltage control on low V(t) metal-gate/high-kappa CMOSFETs with small EOTChin, Albert; Chang, M. F.; Lin, S. H.; Chen, W. B.; Lee, P. T.; Yeh, F. S.; Liao, C. C.; Li, M. -F.; Su, N. C.; Wang, S. J.; 電子工程學系及電子研究所; 光電工程學系; Department of Electronics Engineering and Institute of Electronics; Department of Photonics
1-七月-2009Flat band voltage control on low V-t metal-gate/high-kappa CMOSFETs with small EOTChin, Albert; Chang, M. F.; Lin, S. H.; Chen, W. B.; Lee, P. T.; Yeh, F. S.; Liao, C. C.; Li, M. -F.; Su, N. C.; Wang, S. J.; 電子工程學系及電子研究所; 光電工程學系; 光電工程研究所; Department of Electronics Engineering and Institute of Electronics; Department of Photonics; Institute of EO Enginerring
2008Good 150 degrees C Retention and Fast Erase Characteristics in Charge-Trap-Engineered Memory having a Scaled Si3N4 LayerLin, S. H.; Chin, Albert; Yeh, F. S.; McAlister, S. P.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2008High density and low leakage current in TiO(2) MIM capacitors processed at 300 degrees CCheng, C. H.; Lin, S. H.; Jhou, K. Y.; Chen, W. J.; Chou, C. P.; Yeh, F. S.; Hu, J.; Hwang, M.; Arikado, T.; McAlister, S. P.; 機械工程學系; 電子工程學系及電子研究所; Department of Mechanical Engineering; Department of Electronics Engineering and Institute of Electronics
2010High Performance Ultra-Low Energy RRAM with Good Retention and EnduranceCheng, C. H.; Tsai, C. Y.; Chin, Albert; Yeh, F. S.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2009High-Density and Low-Leakage-Current MIM Capacitor Using Stacked TiO(2)/ZrO(2) InsulatorsLin, S. H.; Chiang, K. C.; Chin, Albert; Yeh, F. S.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2009High-Density and Low-Leakage-Current MIM Capacitor Using Stacked TiO2/ZrO2 InsulatorsLin, S. H.; Chiang, K. C.; Chin, Albert; Yeh, F. S.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2010High-kappa TiCeO MIM Capacitors with a Dual-Plasma Interface TreatmentCheng, C. H.; Hsu, H. H.; Hsieh, I. J.; Deng, C. K.; Chin, Albert; Yeh, F. S.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2008High-Performance MIM Capacitors Using a High-kappa TiZrO DielectricCheng, C. H.; Pan, H. C.; Lin, S. H.; Hsu, H. H.; Hsiao, C. N.; Chou, C. P.; Yeh, F. S.; Chin, Albert; 機械工程學系; 電子工程學系及電子研究所; Department of Mechanical Engineering; Department of Electronics Engineering and Institute of Electronics
1-六月-2010Higher-kappa titanium dioxide incorporating LaAlO(3) as dielectrics for MIM capacitorsCheng, C. H.; Hsu, H. H.; Chen, P. C.; Liou, B. H.; Chin, Albert; Yeh, F. S.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2010Higher-kappa titanium dioxide incorporating LaAlO3 as dielectrics for MIM capacitorsCheng, C. H.; Hsu, H. H.; Chen, P. C.; Liou, B. H.; Chin, Albert; Yeh, F. S.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2012Highly uniform low-power resistive memory using nitrogen-doped tantalum pentoxideCheng, C. H.; Chen, P. C.; Wu, Y. H.; Wu, M. J.; Yeh, F. S.; Chin, Albert; 機械工程學系; 電子工程學系及電子研究所; Department of Mechanical Engineering; Department of Electronics Engineering and Institute of Electronics
2010Highly-Scaled 3.6-nm ENT Trapping Layer MONOS Device with Good Retention and EnduranceTsai, C. Y.; Lee, T. H.; Chin, Albert; Wang, Hong; Cheng, C. H.; Yeh, F. S.; 電機工程學系; Department of Electrical and Computer Engineering
2009Improved Device Characteristics in Charge-Trapping-Engineered Flash Memory Using High-kappa DielectricsChin, Albert; Lin, S. H.; Tsai, C. Y.; Yeh, F. S.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十二月-2009Improved Stress Reliability of Analog Metal-Insulator-Metal Capacitors Using TiO(2)/ZrO(2) DielectricsLin, S. H.; Chiang, K. C.; Yeh, F. S.; Chin, Albert; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十二月-2009Improved Stress Reliability of Analog Metal-Insulator-Metal Capacitors Using TiO2/ZrO2 DielectricsLin, S. H.; Chiang, K. C.; Yeh, F. S.; Chin, Albert; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2008Improving the retention and endurance characteristics of charge-trapping memory by using double quantum barriersLin, S. H.; Yang, H. J.; Chen, W. B.; Yeh, F. S.; McAlister, Sean P.; Chin, Albert; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
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