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公開日期標題作者
2007Improved NBTI in SiN-capped PMOSFETs with ultra-thin HfO2 bufferLu, Ching-Sen; Lin, Horng-Chih; Chen, Ying-Hung; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十月-2015Improving Electrical Performances of p-Type SnO Thin-Film Transistors Using Double-Gated StructureZhong, Chia-Wen; Lin, Horng-Chih; Liu, Kou-Chen; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2010In Situ Doped Source/Drain for Performance Enhancement of Double-Gated Poly-Si Nanowire TransistorsChen, Wei-Chen; Lin, Horng-Chih; Chang, Yu-Chia; Lin, Chuan-Ding; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
15-二月-2010Insight into the performance enhancement of double-gated polycrystalline silicon thin-film transistors with ultrathin channelLin, Zer-Ming; Lin, Horng-Chih; Chen, Wei-Chen; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2014Investigation of p-type junction-less independent double-gate poly-Si nano-strip transistorsLiu, Keng-Ming; Lin, Zer-Ming; Wu, Jiun-Peng; Lin, Horng-Chih; Huang, Tiao-Yuan; 光電工程學系; Department of Photonics
1-八月-2011Investigations of an Independent Double-Gated Polycrystalline Silicon Nanowire Thin Film Transistor for Nonvolatile Memory OperationsChen, Wei-Chen; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
29-二月-2012A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowiresSu, Chun-Jung; Su, Tuan-Kai; Tsai, Tzu-I; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; 奈米中心; Department of Electronics Engineering and Institute of Electronics; Nano Facility Center
1-十一月-2012Low-Operating-Voltage Ultrathin Junctionless Poly-Si Thin-Film Transistor Technology for RF ApplicationsTsai, Tzu-I; Chen, Kun-Ming; Lin, Horng-Chih; Lin, Ting-Yao; Su, Chun-Jung; Chao, Tien-Sheng; Huang, Tiao-Yuan; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-一月-1970Low-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al2O3 stack structure using an implant-free techniqueSu, Chun-Jung; Tsai, Tzu-I; Lin, Horng-Chih; Huang, Tiao-Yuan; Chao, Tien-Sheng; 電子物理學系; 電子工程學系及電子研究所; 奈米中心; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics; Nano Facility Center
7-十月-2013Low-voltage high-speed programming/erasing floating-gate memory device with gate-all-around polycrystalline silicon nanowireLee, Ko-Hui; Tsai, Jung-Ruey; Chang, Ruey-Dar; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2013A New Methodology for Probing the Electrical Properties of Heavily Phosphorous-Doped Polycrystalline Silicon NanowiresLin, Horng-Chih; Lin, Zer-Ming; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2014Novel BEOL InGaZnO R-load-Type Logic-Gate TechnologyChan, Chin-Wen; Lin, Horng-Chih; Huang, Tiao-Yuan; 電機學院; 電子工程學系及電子研究所; College of Electrical and Computer Engineering; Department of Electronics Engineering and Institute of Electronics
1-三月-2013A Novel Charge-Trapping-Type Memory With Gate-All-Around Poly-Si Nanowire and HfAlO Trapping LayerLee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A Novel Double-gated Nanowire TFT and Investigation of Its Size DependencyChen, Wei-Chen; Lin, Chuan-Ding; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2014Novel gate-all-around polycrystalline silicon nanowire memory device with HfAlO charge-trapping layerLee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2015Novel InGaZnO inverters utilizing film profile engineeringLin, Horng-Chih; Wu, Ming-Hung; Chan, Chin-Wen; Lyu, Rong-Jhe; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2013Novel Method for Fabrication of Tri-Gated Poly-Si Nanowire Field-Effect Transistors With Sublithographic Channel DimensionsLee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2006Novel method of converting metallic-type carbon nanotubes to semiconducting-type carbon nanotube field-effect transistorsChen, Bae-Horng; Wei, Jeng-Hua; Lo, Po-Yuan; Pei, Zing-Way; Chao, Tien-Sheng; Lin, Horng-Chin; Huang, Tiao-Yuan; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
1-七月-2008A novel multiple-gate polycrystalline silicon nanowire transistor featuring an inverse-T gateLin, Horng-Chih; Hsu, Hsing-Hui; Su, Chun-Jung; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2008A novel poly-Si nanowire TFT for nonvolatile memory applicationsHsu, Hsin-Hwei; Lin, Horng-Chih; Huang, Jian-Fu; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
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