1. 目前位置：

瀏覽 的方式： 作者 Chen, TY

跳到： 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
或是輸入前幾個字：  
顯示 1 到 20 筆資料，總共 27 筆  下一頁 >
公開日期標題作者
15-五月-2001Activation of p-type GaN in a pure oxygen ambientWen, TC; Lee, SC; Lee, WI; Chen, TY; Chan, SH; Tsang, JS; 電子物理學系; 友訊交大聯合研發中心; Department of Electrophysics; D Link NCTU Joint Res Ctr
1-八月-2003Analysis on the dependence of layout parameters on ESD robustness of CMOS devices for manufacturing in deep-submicron CMOS processChen, TY; Ker, MD; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2001Compact layout rule extraction for latchup prevention in a 0.25-mu m shallow-trench-isolation silicided bulk CMOS processKer, MD; Lo, WY; Chen, TY; Tang, H; Chen, SS; Wang, MC; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2002Design and analysis of on-chip ESD protection circuit with very low input capacitance for high-precision analog applicationsKer, MD; Chen, TY; Wu, CY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2000Design and analysis of the on-chip ESD protection circuit with a constant input capacitance for high-precision analog applicationsKer, MD; Chen, TY; Wu, CY; Chang, HH; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2001Design on ESD protection circuit with very low and constant input capacitanceChen, TY; Ker, MD; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2000ESD protection design on analog pin with very low input capacitance for high-frequency or current-mode applicationsKer, MD; Chen, TY; Wu, CY; Chang, HH; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2001ESD protection strategy for sub-quarter-micron CMOS technology: Gate-driven design versus substrate-triggered designChen, TY; Ker, MD; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-1997An examination of the wind-driven effect on the drift of precipitation particles using the Chung-Li VHF radarChu, YH; Chen, TY; Lin, TH; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-1997An examination of the wind-driven effect on the drift of precipitation particles using the Chung-Li VHF radarChu, YH; Chen, TY; Lin, TH; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2000Identification of general fuzzy measures by genetic algorithms based on partial informationChen, TY; Wang, JC; Tzeng, GH; 管理學院; College of Management
11-三月-2005Identification of V23RalA-Ser(194) as a critical mediator for aurora-A-induced cellular motility and transformation by small pool expression screeningWu, JC; Chen, TY; Yu, CTR; Tsai, SJ; Hsu, JM; Tang, MJ; Chou, CK; Lin, WJ; Yuan, CJ; Huang, CYF; 生物科技學系; Department of Biological Science and Technology
2001Investigation on ESD robustness of CMOS devices in a 1.8-v 0.15-mu m partially-depleted SOI salicide CMOS technologyKer, MD; Hong, KK; Chen, TY; Tang, H; Huang, SC; Chen, SS; Huang, CT; Wang, MC; Loh, YT; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2002Layout design to minimize voltage-dependent variation on input capacitance of an analog ESD protection circuitKer, MD; Chen, TY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
20-五月-2002Low-etch-pit-density GaN substrates by regrowth on free-standing GaN filmsTsai, CC; Chang, CS; Chen, TY; 光電工程學系; Department of Photonics
1-六月-2004Magnetic switching and reversal process in a tip ring structureLiou, Y; Chen, DC; Yu, C; Chen, JS; Lee, SF; Yao, YD; Tzeng, CC; Chen, TY; Cheng, KW; Ma, R; 材料科學與工程學系; Department of Materials Science and Engineering
1-六月-1998Multiple-cell square-type layout design for output transistors in submicron CMOS technology to save silicon areaKer, MD; Wu, CY; Huang, CC; Chen, TY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2005Neural-network-identification-based adaptive control of wing rock motionsHsu, CF; Lin, CM; Chen, TY; 電控工程研究所; Institute of Electrical and Control Engineering
1-三月-1999New layout design for submicron CMOS output transistors to improve driving capability and ESD robustnessKer, MD; Chen, TY; Chang, HH; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1998Novel input ESD protection circuit with substrate-triggering technique in a 0.25-mu m shallow-trench-isolation CMOS technologyKer, MD; Chen, TY; Wu, CY; Tang, H; Su, KC; Sun, SW; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
顯示 1 到 20 筆資料，總共 27 筆  下一頁 >