提升式通道結構及鍺引致再結晶複晶矽薄膜電晶體之研製

Abstract

使用複晶矽薄膜電晶體(poly-Si TFT)製作畫素元件及周邊驅動電路並將之積體化於大面積玻璃基版已是現在製作平面顯示器的趨勢之一，而快速的低溫製程將會是對於複晶矽薄膜電晶體的一個關鍵技術。在本論文中我們將討論一種提升式通道結構來改善薄膜電電晶體的元件可靠度特性。並且探討一介於鎳及非晶矽間之奈米尺度絕緣層及使用鍺材料對金屬側向再結晶（MILC）製程其元件特性之影響。 在第一部份中，我們研究提升式通道結構並將之應用於閘極覆蓋淡摻雜汲極（GOLDD）製程。從實驗分析中可以清楚看到提升式通道結構比一般薄膜電晶體結構更能抑制驅動電流衰竭的能力，因其能降低汲極端的串聯電阻及大幅降低汲極端附近的橫向電場。 在第二部份中，我們可以了解因有絕緣層存在，故會有較少的NiSi2聚集物存在於通道中，而經由不同溫度活化後可由電性比較得知其結晶品質的好壞。並且利用已知的Ge會加速非晶矽結晶的道理 我們發現特定的沈積Ge順序及適當溫度才會增加MILC結晶的速率。

Utilizing polycrystalline silicon thin-film transistors (poly-Si TFT) as on-glass pixel switching elements and peripheral driver circuit is the trend for fabricating active-matrix liquid-crystal displays(AMLCD). The fast rate of crystalline and low temperature process for poly-Si TFTs are the key point of fabrication. In the thesis, we discussed an elevated channel structure which is utilized to improve the performance of device. And the characteristic of MILC device are deposited nanocap layer and Ge layer. In the first part, the elevated channel structure is investigated and applied to gate overlapping LDD structure. The performance of elevated channel structure can suppress the reduction of ON current. This is because that the structure can decrease series resistor and the lateral electrical field near drain region. In the second part, we utilized the nanocap layer to diminish the amount of NiSi2 and the high activation temperature to find out the quality of grain. And we also found that the rate of MILC will enhance at specific sequence of deposit and suitable crystallized temperature.